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Journal of Electron Microscopy 50:479-484 (2001)
© 2001 Oxford University Press

Paper

Examination of electrostatic potential distribution across an implanted p–n junction by electron holography

Zhouguang Wang, Katsuhiro Sasaki, Naoko Kato, Kenya Urata, Tsukasa Hirayama and Hiroyasu Saka

Japan Fine Ceramics Center, 2-4-1 Mitsuno, Atsuta-ku, Nagoya 456-8587
Department of Quantum Engineering, Nagoya University, Furo-cho, Chikusa-ku, Nagoya 464-8603
Semiconductor Failure Analysis Laboratory, International Test and Engineering Services Co., Ltd, 800, Ichimiyake, Yasu-cho, Yasu-gun, Shiga-ken 520-2392
Image Sense Co., Ltd, Katsushika-ku, Tokyo 124-0013, Japan

In the manufacture of semiconductor microelectronic devices, a p–n junction is formed usually by implanting a high concentration of impurity into a less heavily doped region and then heat annealing. A Si / Si p–n junction test sample has been made following the above practical process and thinned for electron holographic observation by using argon ion-milling. From the reconstructed phase image, the phase shift induced by potential drop across p–n junction can be seen clearly. To characterize quantitatively this potential drop, the mean inner potential V0 of silicon was measured precisely by electron holographic method. By measuring 25 different crystalline silicon spheres with diameter ranging from 40 to 170 nm, an average result of V0 = 12.16 ± 0.83 V was obtained. By using this V0 value, a quantitative measurement yields the potential drop ~0.70 V, which is reasonably consistent with expected Si / Si junction parameter. The thickness of electric dead layer in depletion region produced from this measuring is ~20 nm on each sample surface.

Keywords     off-axis electron holography, p–n junction, silicon, mean inner potential


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